mitsumi ic for system reset pst591~595 ic for system reset monolithic ic pst591~595 series outline this ic functions in a variety of cpu systems and other logic systems, to detect supply voltage and reset the system accurately when the power is turned on or interrupted. it incorporates a fixed-delay time generation circuit. these are other system reset ics such as pst574 and pst575 (both conventional). in particular, this ic is a low-reset type system reset ic having a counter timer comprising of analog/digital mixed circuits. pst591- 595 have a different delay time respectively. features 1. fixed delay time setting by counter timer excellent delay time temperature characteristics ?00ppm/ c 2. low operating limit voltage 0.65v typ. 3. hysteresis voltage provided for detection voltage 50mv typ. 4. no-load current consumption i ccl =300? typ. i cch =200? typ. 5. 5 models are available for different delay times. pst591 50ms pst594 400ms pst592 100ms pst595 800ms pst593 200ms 6. each model has 9 detection voltage ranks. c : 4.5v typ. h : 3.1v typ. d : 4.2v typ. i : 2.9v typ. e: 3.9v typ. j : 2.7v typ. f: 3.6v typ. k : 2.5v typ. g: 3.3v typ. packages mmp-4a (pst59 m) to-92a (pst59 ) * the box represents a rank of detection voltage. (mmp-4a has a manual reset pin, which should be connected to gnd or nc during normal operation.) applications 1. reset circuits for microcomputers, cpus and mpus 2. reset circuits for logic circuits 3. battery voltage check circuits 4. back-up power supply switching circuits 5. level detection circuits 6. mechanical reset circuits 0 d u p c f s
mitsumi ic for system reset pst591~595 equivalent circuit diagram absolute maximum ratings (ta=25 c) pin assignment 123 to - 92a 12 43 mmp - 4a (top view) 1 v cc 2 gnd 3 v out 1 v out 2 manual reset 3 v cc 4 gnd item symbol rating units storage temperature t stg - 40~+125 c operating temperature t opr - 20~+75 c power supply voltage v cc max. - 0.3~10 v manual reset input voltage v res max. - 0.3~10 v allowable loss pd 200 (mmp-4p) mw 300 (to-92)
mitsumi ic for system reset pst591~595 measuring circuit [1] [2] electrical characteristics (ta=25 c) (except where noted otherwise, resistance unit is ? ) * 1 tplh : v cc = (v s typ. - 0.4v) (v s typ.+0.4v), tphl : v cc = (v s typ.+0.4v) (v s typ. - 0.4v) * 2 v cc =v s min. - 0.15v note 3: v out pin is low when manual reset pin is high. v out pin is high when manual reset pin is low. note: input model is an example for pst591c. item symbol measuring circuit measurement conditions min. typ. max. unit c 4.3 4.5 4.7 d 4.0 4.2 4.4 e 3.7 3.9 4.1 r l =470 f 3.4 3.6 3.8 detection voltage v s 1v ol < = 0.4v g 3.1 3.3 3.5 v v cc =h l h 2.9 3.1 3.3 i 2.75 2.90 3.05 j 2.55 2.70 2.85 k 2.35 2.50 2.65 hysteresis voltage v s 1r l =470, v cc =l h l 30 50 100 mv detection voltage temperature coefficient v s / t 1 r l =470, ta= - 20 c~+75 c ?.01 %/ c low-level output voltage v ol 1 v cc =vs min. - 0.05v, r l =470 0.1 0.4 v output leakage current i oh 1v cc =10v ?.1 ? circuit current while on i ccl 1v cc =vs min. - 0.05v, r l = 300 600 ? circuit current while off i cch 1v cc =vs typ./0.85v, r l = 200 350 ? pst591 30 50 75 r l =4.7k pst592 60 100 150 "h" transport delay time t plh 2 c l =100pf * 1 pst593 120 200 300 ms pst594 240 400 600 pst595 480 800 1200 "l" transport delay time t phl 2r l =4.7k, c l =100pf * 110 s operating power supply voltage v opl 1r l =4.7k, v ol < = 0.4v 0.65 0.85 v output current while on 1 i ol 11v cc =v s min. - 0.05v, r l =0 8 ma output current while on 2 i ol 21 ta= - 20 c ~+75 c , r l =0 * 2 6ma manual input high voltage v resh 2.0 v reset input high current v resh v res =2v 80 ? pin input low voltage v resl 0.8 v
mitsumi ic for system reset pst591~595 i cc h ( a) ta ( c) - 40 - 20 0 20 40 60 80 180 190 200 210 220 230 i ccl ( a) ta( c) - 40 - 20 0 20 40 60 80 200 250 300 350 400 450 i ccl vs. ta i o l (ma) ta ( c) - 40 - 20 0 20 40 60 80 15 20 25 30 35 40 i o l vs. ta t plh (ms) ta ( c) - 40 - 20 0 20 40 60 80 48 49 50 51 52 53 t plh vs. ta i cch vs. ta v o l (mv) ta ( c) - 40 - 20 0 20 40 60 80 0 50 100 150 200 250 v s (mv) ta ( c) - 40 - 20 0 20 40 60 80 30 40 50 60 70 80 90 v s vs. ta v o l vs. ta - 40 - 20 0 20 40 60 80 3.9 4.0 4.1 4.2 4.3 4.4 v s (v) ta ( c) 8 7 6 5 4 3 2 1 0 0 12345678 v out (v) v cc (v) ta = - 25 c ta = 25 c ta = 75 c v cc vs. v out v s vs. ta characteristics (example: pst591d)
mitsumi ic for system reset pst591~595 timing chart 6 5 7 4 3 2 1 0 v cc /v out (v) r eset v cc v out v s time on off undefined application circuits 1. normal hard reset note: connect a capacitor between ic v cc and gnd pins if v cc line impedance is high. t phl ( s) ta ( c) - 40 - 20 0 20 40 60 80 7 8 9 10 11 12 t phl vs. ta 300 200 0 025507 5 100 125 100 pd (mw) ta ( c) to92 mmp4 pd vs. ta
mitsumi ic for system reset pst591~595 2. manual reset v out pin low for manual switch on. v out pin high for manual switch off. note1: connect a capacitor between ic v cc and gnd pins if v cc line impedance is high. note2: thoroughly check the actual operation of the circuit, then set the manual reset when pressing the manual switch on to about 2?. 3. mute circuit note: connect a capacitor between ic v cc and gnd pins if v cc line impedance is high.
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